Job Duties
- Responsible for 40nm and 28nm FEOL process developing, failure analysis, FMEA, and Pareto-chart. Based on the results, develop a plan for process improvement accordingly.
- FEOL PCM design and collaborate with Fab for inline monitor management.
- Process integration of 28nm HK/MG and strain-Si process and its derivative devices.
- Collaborate with module/device teams for technology development, process window and device performance improvement.
- Collaborate with reliability team for process qualification and device robustness improvement.
- Establish relevant process documents and design rule manual.
Education
- Master’s or PhD degree in Electrical Engineering, Electronics, Physics, Materials Science, or related field.
Experience
- 10+ years of semiconductor process integration and development experience in 12-inch wafer fabs.
Requirements
- Experience in HK/MG, strain-Si process development is necessary.
技能標籤： 28nm, integration manager, sige, strain-si process, technology development
