Job description
- Ownership of a small ARM SoC system(design and integration)
- SoC and simulation and verification
- FPGA verification
- Run all digital design flow(synthesis/STA/lint/LEC/…) for tape out
- Backend contact window
- Chip bring up and test tasks
- Manage 2-3 members
Job requirement
- BS, MS or PhD in electrical engineering, computer engineering or computer science with a special focus on digital system design, computer architecture or computer hardware design
- 5~15 years of industry experience is preferred
- Experience in RTL design. Verilog is required and SystemVerilog
- Experience in ARM processor, bus design, SoC integration, standard interfaces protocols and common IP blocks
- Experience in design flows for simulation, synthesis, verification, design for testing, static timing analysis, logic equivalence check, etc.
- Experience in chip tape-out and volume production, especially in 28/12nm nodes
- Skilled in system verification such as FPGA prototype buildup and debug
- Familiarity with script programming such as shell script, make, Python, etc.
- Willing to take on challenges, and effective English communications and co-work with other team members
- Experience in lead a team to go through all tape out process
Compensation and benefits
- Salary + bonus: NTD 2.5M-4M/year
- Stock option offerings
- Generous PTO and benefits
- High growth potential
- Competitive salary 1~>3M
- Stock option offerings
- Generous PTO and benefits
- High growth potential
技能標籤: GIT, github, linux, MCU