- Review and co-design with an AI Accelerator IP with NTCU using FPGA.
- Be responsible for checking and accepting the NTCU’s design and able to provide the test report.
- Write the test program by using a high-level programming language like Python.
- Able to understand HDL (Verilog is preferred) and write good RTL code.
- Good understanding of digital circuit working principles.
- Familiar with at least one current popular general-purpose programming language.
- Understand 3rd party designed digital IP like DSP block, AXI bus, memory PHY.
- Good understanding of modem processor elements like cache, memory address, MMU, interrupt, and exception.
- Willing to learn logic synthesis using Xilinx, Intel, or other EDA tools and can verify it with the corresponding FPGA.
- Self-motivated, eager to learn, good communication skills.
Nice to Have
- Willing to learn new programming languages quickly with the current popular software framework.
- Having experience with computer vision or machine learning.
- Good English communication skill.
- Understanding Linux kernel and operating system.
- Over 5 years experience in FPGA.