工作內容
- PCIe high-speed PHY mixed signal design:TX(FFE, driver), RX(CTLE, DFE, CDR), PLL(LC-tank VCO), DAC/ADC, Bandgap, LDO, POR, IO/ESD, … etc.
- Communicate with digital, layout and system engineer
- Design verification/documentation/supporting
擅長工具
- HSPICE、Laker、Python
應聘條件
- 需熟悉類比電路設計
其他
- 必須對電子/科學/工程有興趣
- 喜歡探究知識/問題的根源