工作內容
- Digital IC design
- Low power design
- RTL coding/simulation
- SoC integration
- FPGA/IC verification
需求條件
- Familiar with Verilog RTL coding/simulation
- Familiar with 28nm/12nm or advanced process
- Familiar with low power methodology
- Familiar with FPGA verification
- Experience in AXI/APB protocol or advanced AMBA bus is preferred
- Experience in PCIe SSD is preferred
- Experience in NVMe/DMA/bus design is preferred
- Experience in SoC integration is preferred
IC design 經驗約4年。
考試時間約一小時，之後主要討論過去經歷及介紹 SMI 的產品，coding 約10題都是概念題。